test_04During previous lesson we learned how to use AXI DMA unit to transfer data from an AXI Stream Master to an AXI Memory Mapped slave port. We showed how AXI DMA can be programmed in order to perform the required transfer task. We did this with the ZYNQ device and we practically showed examples on the ZED board.

In the previous lesson, whenever we want to perform a data transfer using AXI DMA we should program it. Thus for every transfer the CPU should program the AXI DMA. But some times, the required sequence of transfers are known and we like AXI DMA to perform these transfers automatically and without the need to be programmed for each transfer by the CPU. This is where scatter gather operation mode of AXI DMA becomes handy.

In this lesson we focus on Scatter gather DMA transfers. We describe the main concept:descriptors. We then create example hardware designs on the ZED board, and also we develop example software on the ARM host of the ZYNQ device to create a set of descriptors, to send them to the AXI DMA, and to let the AXI DMA work completely independent of the CPU.

Example design is available upon a donation.

PartDescriptionLink
1Concepts of operation of a DMA engine in Scatter-Gather mode. Building an example architecture containing the ZYNQ PS and the AXI DMA in SG mode using Vivado.Part I
2Describing the contents of one DMA descriptor, and the flow of initializing and running the AXI DMA SG engine. Testing the hardware on the ZED board using a set of XMD TCL scripts. Part II