Dynamic Function Exchange with ZYNQ Ultrascale+ : Part 7: Standalone Application C Code
We go through the C source code of the standalone application that we have written for our partial reconfiguration example. Our standalone application configures and runs the DMA engines, also it performs the required partial reconfiguration task which allows dynamic exchange of the function of each of our 3 reconfiguration partitions.
Dynamic Function Exchange with ZYNQ Ultrascale+ : Part 6: Standalone Software Config
In this video we continue within Vitis environment. We create our standalone software project using the XSA file from Vivado design. We add the required libraries for partial reconfiguration to the BSP. We also update the linker script.
Dynamic Function Exchange with ZYNQ Ultracale+ : Part 5: Vivado Outputs and starting Vitis
Part 5 of Dynamic Function Exchange (DFX) (Partial Reconfiguration) with ZYNQ Ultrascale. In this part we look at the outputs of vivado project. we look at created partial bistreams, we discuss how these bitstreams can be used for changing the functionality of our reconfigurable blocks dynamically. We export the XSA file and run the vitis environment.
Dynamic Function Exchange with ZYNQ Ultracale+ : Part 4: Partial Reconfiguration Flow (2)
In this video we go through the steps done in vivado to enable partial reconfiguration, assign modules to partial reconfigurable partitions, and define run-time configurations.
Dynamic Function Exchange with ZYNQ Ultracale+ : Part 3: Partial Reconfiguration Flow (1)
In this video we briefly review the vivado project that we have prepared for our partial reconfiguration flow. We address key points that need to be considered for partial reconfiguration. Design source codes and deliveries are available upon a fair donation.
Dynamic Function Exchange with ZYNQ Ultracale+ : Part 2: Vivado Project
This is the second hobby video for partial reconfiguration series. In this video we start looking at the Vivado design that we use to show the partial reconfiguration flow. We create the design step by step and describe every part.
Dynamic Function Exchange with ZYNQ Ultracale+ : Part 1: Introduction
Introduction to new series of hobby videos on Dynamic Function Exchange (Partial Reconfiguration) for ZYNQ Ultrascale+ devices. Contents apply to other Xilinx FPGAs as well.